In recent years, semiconductor devices have become small in size and the structure of semiconductor elements have become more complicated. In addition, the layers in multilayer interconnects used for a logical system have increased in number. Accordingly, irregularities on a surface of a semiconductor device are likely to increase and step heights are also likely to increase. This is because, during a manufacturing process of the semiconductor device, a thin film is formed on the semiconductor device, then micromachining processes, such as patterning or forming holes, are performed on the semiconductor device, and these processes are repeated many times to form subsequent thin films on the semiconductor device.
When irregularities on the surface of the semiconductor device increase, the following problems arise. When a thin film is formed on the semiconductor device, the thickness of the film formed on the step portions is relatively small. Further, an open circuit may be caused by disconnection of interconnects, or a short circuit may be caused by insufficient insulation between interconnect layers. As a result, it is difficult to obtain good products, and the yield tends to be lowered. Even if a semiconductor device initially works normally, reliability of the semiconductor device is lowered after long-term use. Further, at a time of exposure during the lithography process, if an irradiation surface has irregularities, then a lens unit in an exposure system is locally unfocused. Therefore, if the irregularities on the surface of the semiconductor device increase, it becomes problematically difficult to form the fine pattern itself on the semiconductor device.
Thus, it becomes increasingly important in a manufacturing process of a semiconductor device to planarize the surface of the semiconductor device. One of the most important planarizing technologies is chemical mechanical polishing (CMP). The chemical mechanical polishing is performed using a polishing apparatus. Specifically, a substrate, such as a semiconductor wafer, is brought into sliding contact with a polishing surface while a polishing liquid containing abrasive particles such as silica (SiO2) is supplied onto the polishing surface, so that the substrate is polished.
This kind of polishing apparatus comprises a polishing table having a polishing surface formed on a polishing pad, and a substrate holding device, which is called a top ring, for holding a semiconductor wafer. The polishing apparatus polishes a semiconductor wafer as follows. The substrate holding device holds the semiconductor wafer and presses the semiconductor wafer against the polishing surface at a certain pressure. In this state, the polishing table and the substrate holding device are moved relative to each other to bring the semiconductor wafer into sliding contact with the polishing surface, whereby the semiconductor wafer is polished to have a flat and mirror-finished surface.
In the above polishing apparatus, if the relative pressing force between the semiconductor wafer and the polishing surface of the polishing pad is not uniform over an entire surface of the semiconductor wafer during polishing, then the semiconductor wafer may be insufficiently polished or may be excessively polished at some portions depending on the pressing force applied to those portions of the semiconductor wafer. In order to avoid such a drawback, it has been attempted to form a substrate-holding surface of the substrate holding device with use of an elastic membrane made of elastic material such as rubber, and to apply fluid pressure such as air pressure to a backside surface of the elastic membrane so as to provide a uniform pressing force over the entire surface of the semiconductor wafer.
However, use of such an elastic membrane may meet the following problems. When the semiconductor wafer is being rotated, the elastic membrane is twisted and deformed. As a result, a polishing rate, i.e., a removal rate, at a peripheral portion (edge portion) of the semiconductor wafer is greatly lowered compared with other portions. Further, due to such twisting and deformation of the elastic membrane, a polishing profile may not be symmetrical, especially at the edge portion, about a center of the semiconductor wafer. Furthermore, individual differences of elastic membranes and retainer rings, which hold a peripheral portion of the semiconductor wafer, may cause a variation in polishing profiles among the top rings.